uCsim, Copyright (C)  Daniel Drotos.
uCsim comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
#dump 0x5000 0x501d

# Ports are set to input on reset so if we zero the pins then set
# the ODR both pins and IDR should remain zero.
set mem pa_pins 0x00
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0
set mem PA_ODR 0xff
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
dump pa_pins PA_IDR
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0
dump [/format] memory_type [start [stop [bytes_per_line]]] | dump bit...
                    Dump memory of specified type or bit(s)

# Now set all the pins then set every other bit of the data direction register.
set mem pa_pins 0xff
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b11111111 0xff '.' 255 ( -1)
set mem PA_DDR 0b10101010
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data

# For the pins set to output the pins and IDR bits shadow the ODR data...
dump pa_pins PA_IDR
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b11111111 0xff '.' 255 ( -1)
dump [/format] memory_type [start [stop [bytes_per_line]]] | dump bit...
                    Dump memory of specified type or bit(s)
set mem pa_pins 0x00
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0
dump pa_pins PA_IDR
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0
dump [/format] memory_type [start [stop [bytes_per_line]]] | dump bit...
                    Dump memory of specified type or bit(s)

# ...and cannot be changed via the IDR...
set mem PA_IDR 0x00
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data

# ...but can be via the ODR.
set mem PA_ODR 0x00
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
dump pa_pins
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0

# Reset back to defaults. Note that only the pa_pins output are affected.
reset
dump pa_pins PA_ODR PA_IDR PA_DDR PA_CR1 PA_CR2
0x05001      pa_idr:                  
             pa_pin:                  
             pa_pins:                  0b00000000 0x00 '.'   0
dump [/format] memory_type [start [stop [bytes_per_line]]] | dump bit...
                    Dump memory of specified type or bit(s)


# Adjust the clock to a suitable speed
set mem CLK_CKDIVR 0b00000001
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data

# Our test VCD provides input on pc_pins.2 and pc_pins.5
# (these should already be inputs after reset, of course)
set mem pc_pins.2 0
0x0500b.2                              0b-----0-- 0x00 '.'   0
set mem pc_pins.5 0
0x0500b.5                              0b--0----- 0x00 '.'   0

# For which we'll take interrupts on either edge initially
set mem EXTI_CR1[5:4] 0b11
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
set mem PC_CR2.2 1
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
set mem PC_CR2.5 1
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data

# So this is our state now
dump pc_pins PC_ODR PC_IDR PC_DDR PC_CR1 PC_CR2 EXTI_CR1 EXTI_CR2 rom[0x50a3][7:0]
0x0500b      pc_idr:                  
             pc_pin:                  
             pc_pins:                  0b00000000 0x00 '.'   0
dump [/format] memory_type [start [stop [bytes_per_line]]] | dump bit...
                    Dump memory of specified type or bit(s)

# Start the vcd (we set the input file via the Makefile) and
# have it stop execution each time an event occurs.
set hw vcd[0] start
set hw vcd[0] break
Break on events enabled

# The VCD data starts at time 0 which will, by default, align
# with the current simulator time. We can adjust that by setting
# starttime. This can be done before or after starting the vcd,
# even part way through. Here we push the vcd 50 µs into the
# future.
set hw vcd[0] starttime 50000 ns

# Set up a vcd to monitor what happens
set hw vcd new 1
set hw vcd[1] output "out/test.vcd"
set hw vcd[1] add PC_IDR.5
set hardware vcd[id] add memory address [ [bit_high] bit_low]
set hardware vcd[id] del[ete] memory address [ [bit_high] bit_low]
set hardware vcd[id] timescale n [ms|us|ns|ps|fs]
set hardware vcd[id] starttime n [ms|us|ns|ps|fs]
set hardware vcd[id] input "vcd_file_name"
set hardware vcd[id] output|file "vcd_file_name"
set hardware vcd[id] mod[ule] module_name
set hardware vcd[id] start
set hardware vcd[id] pause
set hardware vcd[id] [re]start
set hardware vcd[id] stop
set hardware vcd[id] break
set hardware vcd[id] new id
set hw vcd[1] add PC_IDR.2
set hardware vcd[id] add memory address [ [bit_high] bit_low]
set hardware vcd[id] del[ete] memory address [ [bit_high] bit_low]
set hardware vcd[id] timescale n [ms|us|ns|ps|fs]
set hardware vcd[id] starttime n [ms|us|ns|ps|fs]
set hardware vcd[id] input "vcd_file_name"
set hardware vcd[id] output|file "vcd_file_name"
set hardware vcd[id] mod[ule] module_name
set hardware vcd[id] start
set hardware vcd[id] pause
set hardware vcd[id] [re]start
set hardware vcd[id] stop
set hardware vcd[id] break
set hardware vcd[id] new id
set hw vcd[1] add 0x0000
set hw vcd[1] add rom[0x50a3].2
set hw vcd[1] add EXTI_CR1[5:4]
set hardware vcd[id] add memory address [ [bit_high] bit_low]
set hardware vcd[id] del[ete] memory address [ [bit_high] bit_low]
set hardware vcd[id] timescale n [ms|us|ns|ps|fs]
set hardware vcd[id] starttime n [ms|us|ns|ps|fs]
set hardware vcd[id] input "vcd_file_name"
set hardware vcd[id] output|file "vcd_file_name"
set hardware vcd[id] mod[ule] module_name
set hardware vcd[id] start
set hardware vcd[id] pause
set hardware vcd[id] [re]start
set hardware vcd[id] stop
set hardware vcd[id] break
set hardware vcd[id] new id
set hw vcd[1] start

# Firstly either edge
run
Simulation started, PC=0x008000

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c

# Then on the rising edge
set mem EXTI_CR1[5:4] 0b01
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c

# Then on the falling edge
set mem EXTI_CR1[5:4] 0b10
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c

# The rest as level (0) triggered
set mem EXTI_CR1[5:4] 0b00
set memory memory_type address data... | bit data
                    Place list of data into memory OR set specified bit(s) to data
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
cont
Simulation started, PC=0x00802c

Stop at 0x00802c: (104) Breakpoint
V-IHINZC  Flags= 0x22  34 "  A= 0x00   0 .
0-100010  X= 0x0000   0 .    Y= 0x0000   0 .
SP= 0x17ff [SP+1]= 00   0 .  Limit= 0x14ff
0x0802c  ? cc 80 2c       jp     0x802c                              
F 0x00802c
